Multi-radiofrequency impedance control for plasma uniformity tuning

ABSTRACT

Circuits, methods, chambers, systems, and computer programs are presented for processing wafers. A wafer processing apparatus includes top and bottom electrodes inside a processing chamber; a first, second, third, and fourth radio frequency (RF) power sources; and one or more resonant circuits. The first, second, and third RF power sources are coupled to the bottom electrode. The top electrode may be coupled to the fourth RF power source, to electrical ground, or to the one or more resonant circuits. Each of the one or more resonant circuits, which are coupled between the top electrode and electrical ground, include a tune-in element operable to vary a frequency-dependent impedance presented by the resonant circuit. The wafer processing apparatus is configurable to select the RF power sources for wafer processing operations, as well as the connections to the top electrode in order to provide plasma and etching uniformity for the wafer.

CROSS REFERENCE TO RELATED APPLICATIONS

This application is related by subject matter to U.S. patent applicationSer. No. 13/301,725 filed Nov. 21, 2011, and entitled “TRIODE REACTORDESIGN WITH MULTIPLE RADIOFREQUENCY POWERS”, all of which isincorporated herein by reference.

BACKGROUND

1. Field of the Invention

The present embodiments relate to wafer processing apparatus, and moreparticularly, apparatus, methods, and computer programs for processing awafer in a wafer processing apparatus.

2. Description of the Related Art

The manufacturing of integrated circuits includes immersing siliconsubstrates (wafers) containing regions of doped silicon intochemically-reactive plasmas, where the submicron device features (e.g.,transistors, capacitors, etc.) are etched onto the surface. Once thefirst layer is manufactured, several insulating (dielectric) layers arebuilt on top of the first layer, where holes, also referred to as vias,and trenches are etched into the material for placement of theconducting interconnectors.

Current plasma processing systems used in semiconductor waferfabrication rely on highly interdependent control parameters to controlradical separation, radical flux, ion energy, and ion flux delivered tothe wafer. For example, current plasma processing systems attempt toachieve necessary radical separation, radical flux, ion energy, and ionflux by controlling a single plasma generated in the presence of thewafer. Unfortunately, chemistry dissociation and radical formation arecoupled to ion production and plasma density and often do not work inconcert to achieve the desired plasma processing conditions.

Some semiconductor processing equipment may be used in a wide range ofapplications. However the requirements for each of the applications mayvary substantially, and it may be difficult to accommodate all theapplications in the same processing equipment without adequate controlsto configure the wafer processing process (e.g., to control the plasmachemistry in the chamber). A lack of control on the ion energy in thechamber limits the control of the desired process chemistry. If controlsare not adequate, non-uniform deposition may result with non-uniformetching on the wafer.

It is in this context that embodiments arise.

SUMMARY

Embodiments of the disclosure provide circuits, methods, systems, andcomputer programs for processing wafers. It should be appreciated thatthe present embodiments can be implemented in numerous ways, such as aprocess, an apparatus, a system, a device or a method on a computerreadable medium. Several embodiments are described below.

In one embodiment, a wafer processing apparatus includes top and bottomelectrodes of a processing chamber, a first radio frequency (RF) powersource, a second RF power source, a third RF power source, a fourth RFpower source, and one or more resonant circuits. The first, second, andthird RF power sources are coupled to the bottom electrode. The topelectrode may be coupled to the fourth RF power source, to electricalground, or to the one or more resonant circuits. Each of the one or moreresonant circuits resonate at one of the frequencies of the RF powersources coupled to the bottom electrode. In one embodiment, a firstresonant is coupled between the top electrode and electrical ground, thefirst resonant circuit including a tune-in element operable to vary afrequency dependent impedance of the first resonant circuit. The waferprocessing apparatus is configurable to select the RF power sources forwafer processing operations, as well as the connections to the topelectrode in order to provide plasma and etching uniformity for thewafer.

In another embodiment, a wafer processing apparatus includes top andbottom electrodes of a processing chamber, a first radio frequency (RF)power source, a second RF power source, a third RF power source, afourth RF power source, a first resonant circuit, a first switch, asecond switch, and a third switch. The first, second, and third RF powersources are coupled to the bottom electrode. Further, the first switchis operable to couple the top electrode to the fourth RF power source,the second switch is operable to couple the top electrode to the firstresonant circuit, and the third switch is operable to couple the topelectrode to a first voltage. In one embodiment, the first voltage iselectrical ground.

In yet another embodiment, a method for processing a wafer in a waferprocessing apparatus, which includes a top electrode and a bottomelectrode of a processing chamber, includes an operation for receiving arecipe for processing the wafer and an operation for enabling ordisabling each of a first radio frequency (RF) power, a second RF power,a third RF power, and a fourth RF power based on the recipe. The first,second, and third RF powers are coupled to the bottom electrode. Inaddition, a position of a first switch is set based on the recipe tocouple or decouple the top electrode to the fourth RF power, and aposition of a second switch is set based on the recipe to couple ordecouple the top electrode to a first resonant circuit. The methodfurther includes an operation for setting a position of a third switchbased on the recipe to couple or decouple the top electrode toelectrical ground, and an operation for processing the wafer.

Other aspects will become apparent from the following detaileddescription, taken in conjunction with the accompanying drawings.

BRIEF DESCRIPTION OF THE DRAWINGS

The embodiments may best be understood by reference to the followingdescription taken in conjunction with the accompanying drawings.

FIG. 1 shows an etching chamber, according to one embodiment.

FIGS. 2A-2E show several embodiments of an etching chamber with one ormore resonant circuits.

FIG. 3A illustrates a resonant circuit, according to one embodiment.

FIG. 3B illustrates the formula for calculating the impedance of aresonant circuit, according to one embodiment.

FIGS. 4A-4C present charts related to the performance of a processingapparatus with a 60 MHz resonant circuit, according to one embodiment.

FIGS. 5A-5B present charts related to the performance of a processingapparatus with a 2 MHz resonant circuit, according to one embodiment.

FIGS. 6A-6B present charts related to the performance of a processingapparatus with a 27 MHz resonant circuit, according to one embodiment.

FIG. 7 shows a semiconductor wafer processing apparatus, in accordancewith one embodiment.

FIGS. 8A-8B show the flows of algorithms for processing a wafer in awafer processing apparatus including a top electrode and a bottomelectrode of a processing chamber, in accordance with one embodiment.

FIG. 9 is a simplified schematic diagram of a computer system forimplementing embodiments described herein.

DETAILED DESCRIPTION

The following embodiments describe apparatus, methods and computerprograms for processing a wafer in a wafer processing apparatus.Embodiments of the disclosure use up to four different RF powers in atriode reactor configuration and one or more resonant circuits coupledto the top electrode. It will be apparent, that the present embodimentsmay be practiced without some or all of these specific details. In otherinstances, well known process operations have not been described indetail in order not to unnecessarily obscure the present embodiments.

FIG. 1 shows an etching chamber, according to one embodiment. Excitingan electric field between two electrodes is one of the methods to obtainRF gas discharge in an etching chamber. When an oscillating voltage isapplied between the electrodes, the discharge obtained is referred to asa Capacitive Coupled Plasma (CCP) discharge.

Plasma can be created utilizing stable feedstock gases to obtain a widevariety of chemically reactive by-products created by the dissociationof the various molecules caused by electron-neutral collisions. Thechemical aspect of etching involves the reaction of the neutral gasmolecules and their dissociated by-products with the molecules of theto-be-etched surface, and producing volatile molecules, which can bepumped away. When plasma is created, the positive ions are acceleratedfrom the plasma across a space-charge sheath separating the plasma fromthe walls, to strike the wafer surface with enough energy to removematerial from the surface of the wafer. This is known as ion bombardmentor ion sputtering. Some industrial plasmas, however, do not produce ionswith enough energy to efficiently etch a surface by purely physicalmeans.

In one embodiment, Fluorocarbon gases, such as CF₄ and C—C₄F₈, are usedin the dielectric etch process for their anisotropic and selectiveetching capabilities, but the principles described herein can be appliedto other plasma-creating gases. The Fluorocarbon gases are readilydissociated into smaller molecular and atomic radicals. These chemicallyreactive by-products etch away the dielectric material, which in oneembodiment can be SiO₂ or SiOCH for low-k devices.

The chamber of FIG. 1 illustrates a processing chamber with a topelectrode 104 and a bottom electrode 108. Top electrode 104 may begrounded or coupled to RF generator 120, and the bottom electrode 108 iscoupled to RF generator 118 via matching network 114. RF generator 118provides RF power in 1, 2, or 3 RF frequencies. According to theconfiguration of the chamber for a particular operation, either one ofthe first, second, or third RF frequencies may be turned on or off. Inthe embodiment shown in FIG. 1, RF generator 118 provides 2 MHz, 27 MHz,and 60 MHz frequencies, but other frequencies are also possible.

The chamber of FIG. 1 includes a gas showerhead on the top electrode 104to input gas in the chamber, and a perforated confinement ring 112 thatallows the gas to be pumped out of the chamber. When substrate 106 ispresent in the chamber, silicon focus ring 110 is situated next to thesubstrate such that there is a uniform RF field at the bottom surface ofthe plasma 102 for uniform etching on the surface of the wafer.

Upper electrode 104 may be coupled to ground or coupled to RF powersource 120. Switch 122 is operable to connect the top electrode 104 toground when the switch is in a first position, or to RF power source 120when the switch is in a second position. Matching network 116 is used tocouple top RF power source 120 to the top electrode when the switch 122is in the second position.

The embodiment of FIG. 1 shows a triode reactor configuration where thetop electrode is surrounded by a symmetric RF ground electrode 124.Insulator 126 is a dielectric that isolates ground electrode 124 fromtop electrode 104. In one embodiment, RF power source 120 has afrequency of 400 kHz, but other frequencies are also possible. The lowfrequency RF power on the top electrode controls the ion energy on thetop chamber as well as on the reactor walls. This provides anothercontrol of the plasma chemistry in the chamber, enablingoperation-by-operation adjustment of the power setting in the recipesfor wafer processing.

Each frequency may be selected for a specific purpose in the wafermanufacturing process. In the example of FIG. 1, with RF powers of 2MHz, 27 MHz, and 60 MHz, the 2 MHz RF power provides ion energy control,and the 27 MHz and 60 MHz power provide control of the plasma densityand the dissociation patterns of the chemistry. This configuration,where each RF power may be turned on or off, enables certain processesthat use ultra-low ion energy on the wafers, and certain processes(e.g., soft etch for low-k materials) where the ion energy has to be low(under 100 or 200 eV).

In another embodiment, a 60 MHz RF power is used on the top electrode toget ultra-low energies and very high density. This configuration allowschamber cleaning with high density plasma when the wafer is not in thechamber, while minimizing sputtering on the ESC (electro static chuck)surface. The ESC surface is exposed when the wafer is not present, andany ion energy on the surface must be avoided, which is why the bottom 2MHz and 27 MHz power supplies are off during cleaning.

The chamber with four RF powers provides hardware controls for theplasma chemistries, as well as for the plasma density and uniformity.For example, the radial uniformity may be controlled with theindependent RF source at the top.

FIGS. 2A-2E show several embodiments of an etching chamber with one ormore resonant circuits. Embodiments provide controls for the uniformityof the plasma and the etching rate in the chamber that includes theaddition of one or more resonant circuits coupled to the top electrode.By controlling the RF impedance of on the upper electrode, it ispossible to provide radial uniformity control for the RF frequenciesgenerated at the bottom electrode (e.g., 2 MHz, 27 MHz, and 60 MHz).

Resonance is the tendency of a system to oscillate at a greateramplitude at some frequencies than at others. These are known as thesystem's resonant frequencies (or resonance frequencies). At thesefrequencies, even small periodic driving forces can produce largeamplitude oscillations, because the system stores vibrational energy. Aresonant circuit, as used herein, is an electronic circuit that includesone or more inductors and one or more capacitors, presents an impedancethat varies with the applied radiofrequency, and also presents infiniteimpedance at the resonance frequency of the circuit.

In an ideal resonant circuit, there is no dissipation of energy due toresistance, but in reality small resistance elements in inductors andcapacitors results in small losses of energy. This means that theimpedance at the resonant frequency will not be infinite, but theimpedance will have a very large value. Therefore, the impedance at theresonant frequency will be the highest value (i.e., the maximum) of theimpedance of the circuit for any frequency. If the elements in theresonant circuit were perfect, then the impedance would be infinite.

Sometimes, the etching of the wafer is not uniform across the completesurface of the wafer, due to variations of the plasma density throughoutthe chamber. One way to control the uniformity is to change the gap.However, if the gap is shortened, the plasma is compressed and there maybe a W pattern in the etch ratio based on the distance from the centerof the wafer. Further, some recipes are not sensitive to a change in thegap, and changing the gap would not provide a control for the etchuniformity for these recipes.

Another way to control uniformity is to change the outer electrode 124step, which may affect the etching on the edge of the wafer. However,changing the step is a costly operation in terms of throughput, as thestep may need to be adjusted several times for different operations ofthe process.

FIG. 2A is an embodiment of an etching chamber with three RF powers 118applied to the bottom electrode, and three corresponding resonantcircuits 202, 204, and 206 connected to the top electrode. Each resonantcircuit resonates at one of the frequencies of the RF powers applied tothe bottom electrode 108. Since each resonant circuit presents a highimpedance (infinite impedance for a perfect resonant circuit), the RFpower applied to the bottom electrode may be “searching” for anotherpath to ground, which means that the RF power of the top electrode maybe affected. In one embodiment, a filter 208 is placed between the topelectrode and the match circuit 116, associated with the RF power source120 coupled to the top electrode 104, to block the RF powers from thebottom electrode to reach the RF power source of the top electrode.

Each resonant circuit (202, 204, or 206) has a frequency-dependentimpedance, where the maximum value of the impedance corresponds to theresonant frequency, e.g., the frequency of one of the RF powers on thebottom electrode. For example, resonant circuit 202 presents afrequency-dependent impedance, wherein a maximum value of thefrequency-dependent impedance of resonant circuit 202 corresponds to thefrequency of an RF power of the bottom electrode (e.g., 2 Megahertz). Ifresonant circuit 202 were built with ideal components (e.g., lacking aresistive component), resonant circuit 202 would present an infiniteimpedance at the resonating frequency (e.g., 2 Megahertz). More detailsare provided below with reference to FIGS. 3A and 3B regarding thecalculation of the impedance of a resonant circuit.

Each resonant circuit is designed to resonate at one of the frequenciesapplied to the bottom electrode. The resonant circuits affect the sheathof the upper electrode, the voltage of the sheath, and the phase of thesheath. The resonant circuits also affect the RF current in the plasma.

The semiconductor processing system may be configure at eachsemiconductor processing operation, where different powers may beapplied to the top and bottom electrodes, and different resonantcircuits may be coupled to the top electrode. This provides flexibilityin the processing of the wafer, which may have different requirements(e.g., power levels, etching rates, voltage levels, etc.) for each waferprocessing operation.

FIGS. 2A-2E illustrate some of the possible configurations of thesemiconductor chamber. It is noted that the embodiments illustrated inFIGS. 2A-2E are exemplary and do not represent an exhaustive list of allpossible configurations of the chamber. Each RF power source, top andbottom, and each resonant circuit may be utilized during a particularoperation. In addition, the top electrode may also be coupled toelectrical ground in some embodiments. Further yet, the RF powersapplied to the top and bottom electrode may operate at other frequenciesthan the ones illustrated herein. The embodiments illustrated in FIGS.2A-2E should therefore not be interpreted to be exclusive or limiting,but rather exemplary or illustrative.

For example, FIG. 2B illustrates a chamber with three RF powers appliedto the bottom electrode and no RF power on the top electrode. Inaddition, the chamber includes three resonant circuits 202, 204, and206, arranged in parallel between the top electrode 104 and electricalground.

When RF power is applied to the top electrode (e.g., the chamber of FIG.2A), there is more RF power applied to the plasma than in the case ofthe chamber of FIG. 2B, which does not have RF power on the topelectrode. This causes different operating regimes for the chambers ofFIGS. 2A and 2B. Depending on the process, the system may utilize RFpower on the top electrode or not. In addition, in some embodiments theimpedance of the upper electrode is adjusted by utilizing the resonantcircuits, which enables further control of the sheath at the upperelectrode.

The chamber of FIG. 2C includes three RF powers on the bottom electrodeand one RF power on the top electrode, and there is one resonant circuit206 at 60 Megahertz coupled to the top electrode. This configurationallows the RF power for the 2 Megahertz and the 27 Megahertz to have apath to ground on the top electrode, but the 60 Megahertz RF power willhave to follow a different path to electrical ground that does not gothrough the top electrode. In other words, the chamber of FIG. 2Cprovides impedance control of the plasma for only one of the RF powersapplied to the bottom electrode.

FIG. 2D illustrates an embodiment of a chamber with four RF powersources (one on the top and three on the bottom), and two resonantcircuits 202 and 206 coupled to the top electrode. In this chamber,there is no resonant circuit for the 2 Megahertz RF power. FIG. 2E is asemiconductor processing chamber with no RF power on the top electrodeand resonant circuits for the 27 Megahertz and 60 Megahertz frequencies.The two resonant circuits 204 and 206 are connected in parallel betweenthe top electrode 104 and electrical ground. In this embodiment, no RFpower is applied to the top electrode 104.

FIG. 3A illustrates a resonant circuit, according to one embodiment.FIG. 3A illustrates a resonant circuit for the 60 Megahertz RF power,and the resonant circuits for other frequencies may be built with asimilar arrangement of components but with different values for theinductors and capacitors in the resonant circuit. In addition, it isnoted that the embodiment illustrated in FIG. 3A is exemplary. Otherembodiments may utilize different arrangement of circuit elements, anddifferent values for the circuit elements, as long as the circuitresonates at the desired frequency (e.g., the circuit presents infiniteimpedance at the desired frequency if perfect components whereutilized). The embodiment illustrated in FIG. 3A should therefore not beinterpreted to be exclusive or limiting, but rather exemplary orillustrative. In one embodiment, a circuit having two or more resonancefrequencies is utilized instead of having separate resonant circuits.

Because the top and bottom electrodes are isolated from ground in someembodiments (see for example FIGS. 2A-2E) via insulators, there is acapacitance between ground and the top electrode, which is referred toherein as stray capacitance C_(s). The resonant circuit also includes aninductance L and a variable capacitance C_(x).

The capacitance value of variable capacitor C_(x) is adjusted in orderto obtain the desired resonant frequency for the resonant circuit.Details on the calculation of the value for C_(x) are given below withreference to FIG. 3B. The impedance of the chamber is calculated for thedifferent values of C_(x), and the value of C_(x) that makes the circuitresonates at the desired frequency is utilized. In other words, thevalue of the capacitance of C_(x) is adjusted until the desiredresonance frequency is achieved. See more details below for fine-tuningthe resonant circuit with reference to FIG. 8B.

In addition, as the value of C_(x) changes, the values of the voltagesin the upper and lower electrodes also change. In one embodiment, theinductance L has a value between 0.1 uH and 1 uH, but other values arealso possible. In another embodiment, the value of C_(x) is in the rangeof 3 to 34 pF, but other values are also possible. In one experiment,the stray capacitance C_(s) was measured having a value of 577 pF.

FIG. 3B illustrates the formula 316 for calculating the impedance of aresonant circuit, according to one embodiment. Z₁ is the impedance valuefor the stray capacitance C_(s) and Z₁ is calculated according to thefollowing formula:

$\begin{matrix}{Z_{1} = {{- j}\frac{1}{{wC}_{s}}}} & (1)\end{matrix}$

Z₂ is the impedance of the serial combination of the inductance L andvariable capacitor C_(x). Since the capacitor and the inductance areconnected serially, the impedance Z₂ of the combination may becalculated according to the following formula:

$\begin{matrix}{Z_{2} = {{jLw} - {j\frac{1}{{wC}_{x}}}}} & (2)\end{matrix}$

Z₃ is the impedance of the resonant circuit and is calculated byapplying the calculation of two impedances in parallel, Z₁ and Z₂,according to the following formula:

$\begin{matrix}{Z_{3} = \frac{Z_{1}Z_{2}}{Z_{1} + Z_{2}}} & (3)\end{matrix}$

Combining equations (1), (2) and (3), the value of Z₃ may be calculatedas follows:

$\begin{matrix}{Z_{3} = \frac{j\frac{1}{{wC}_{s}}( {{Lw} - \frac{1}{{wC}_{x}}} )}{\frac{1}{{wC}_{s}} - ( {{Lw} - \frac{1}{{wC}_{x}}} )}} & (4)\end{matrix}$

When the denominator of equation is equal to 0, then Z₃ has a value ofinfinity (or a very high impedance value when components are not idealdue to some resistive element in capacitors and inductance). It is notedthat, for the same resonating frequency, higher inductance values of Ltranslates into lower C_(x) values. In other words, there is a tradeoffbetween the values utilized for the inductance L and the value requiredfor capacitor C_(x).

FIGS. 4A-4C present charts related to the performance of a processingapparatus with a 60 MHz on the bottom electrode and a 60 MHz resonantcircuit on the top electrode, according to one embodiment. FIG. 4A is achart showing the ion saturation current density (mA/cm²) as a functionof the distance from the center of the substrate (radius). In oneembodiment, the substrate is 300 mm in diameter, but the same principlesapply to wafers of any size. FIG. 4A includes two lines: a first linewhen the top electrode is electrically floating, and a second line whenthe top electrode includes a 60 Megahertz resonant circuit. When the topelectrode is floating, the ion density increases from about 100 mm to180 mm. However, when the top electrode has the 60 MHz resonant circuit,the ion density stays substantially constant from 0 to beyond 150 mm.The ion density decreases outside the 150 mm, which does not affect theetching on the wafer, since the wafer has a radius of 150 mm. Therefore,there is uniformity on the surface of the wafer when using the resonantcircuit.

FIG. 4B shows the etch rate when using a 60 MHz resonant circuit on thetop electrode or when using a top electrode that is electricallyfloating. When the top electrode is floating, the etch rate growsrapidly when going beyond a radius of about 75 millimeters, meaning thatthe etch rate is not uniform across the surface of the substrate.However, when a 60 Megahertz resonant circuit is coupled to the topelectrode, the etch rate shows a substantially uniform etching rateacross the whole surface of the substrate.

It is noted that the measurements shown for FIGS. 4A and 4B are examplesfor a certain configuration of the etching chamber under pre-determinedconditions. The measurements were taken to assess the differencesbetween a chamber with a resonant circuit and without. However, actualdensity and etching rates on the chamber may vary from the charts shownin FIGS. 4A and 4B due to other factors involved when utilizingdifferent recipes for the process. The embodiments illustrated in FIGS.4A-4B should therefore not be interpreted to be exclusive or limiting,but rather exemplary or illustrative.

FIG. 4C shows the impedance of the upper electrode when using a 60Megahertz resonant circuit on the upper electrode. The chart shows theupper electrode impedance when using a 60 megahertz power source at thebottom electrode, and the DC potential of the upper electrode, as afunction of the capacitance value of the adjustable capacitor C_(X).

In one embodiment, when the capacitor has a value of about 30 pF theimpedance becomes very large. The DC potential of the upper electrodealso falls to about −40 volts. The minimum of the upper electrodeimpedance indicates the resonance point at 60 Megahertz. It is alsonoted, that in one embodiment, the phase of the RF signal also changesat the resonance point.

When there is resonance, the impedance approaches infinite, which stopsthe RF from going to the upper electrode, and the RF signal has to finda different path to ground. Is noted that it is difficult to operate atthe resonant point because of the fast slope in the impedance line rightbefore and after the resonant point.

To operate in the resonant point, the capacitance C_(x) is changed untilthe minimum for the voltage is found. But due to the sharp slope of theimpedance curve, there may be problems with stability. In oneembodiment, the Q of the curve is lowered (related to the slope at theresonance point) to make the circuit stable at the resonance point. Thisis accomplished by adding some resistive components in the circuit,which helps lowering the Q.

FIGS. 5A-5B present charts related to the performance of a processingapparatus with a 2 MHz power on the bottom electrode and a 2 MHzresonant circuit, according to one embodiment. FIGS. 5A and 5B show theresults of a chamber utilizing one single RF power of 2 Megahertz. FIG.5A shows the plasma density as a function of the distance from thecenter of the substrate when using a 2 Megahertz RF power at the bottomelectrode. When the top electrode is floating (e.g., not coupled topower or electrical ground) the density across the surface of thesubstrate is uniform.

When using a 2 Megahertz resonance circuit on the top electrode thedensity is higher at the center, decreasing almost linearly from 50 to150 mm. Normally upper and lower electrode plasma sheaths run out ofphase. At 2 Megahertz, there are high voltages on the sheath and whenthe resonant circuit is utilized there is a change in the phase of thetwo sheaths, which may cause some physical effects. This leads toelectron trapping plasma and density enhancement, because the plasmadensity is higher when utilizing the resonance circuit. When there isresonance, there is a high etch rate on the center because the twosheets are in-phase, or almost in-phase. This means that the 2 Megahertzresonant circuit may not be useful to provide process uniformity overthe surface of the wafer for some processes, but for other processes itmay compensate center slow etch rate.

FIG. 5B shows that the etch rate is higher at the center of the waferwhen the top electrode is floating, gradually decreasing towards theedge of the wafer. However, when the resonant circuit is coupled to thetop electrode, the effect is substantially increased, and the etch rateat the edge of the wafer is much less than the etch rate at the centerof the wafer.

There are more secondary electrons produced at the bottom due to theincreased density when using the resonant circuit, as there are moreelectrons reflected from the top sheath back into the plasma. Thiscauses an increase in plasma density due to the additional ionization.In addition, there are more secondary electrons produced at the topelectrode due to the higher sheath potential and the more negative upperelectrode voltages, resulting in additional ionization and an increasein the plasma density.

FIGS. 6A-6B present charts related to the performance of a processingapparatus with a 27 MHz resonant circuit, according to one embodiment.FIGS. 6A and 6B show the results of the performance measurements in thechamber when utilizing a single RF power of 27 megahertz at the bottomelectrode. As observed in FIG. 6A, the plasma density is higher when thetop electrode is grounded than when the top electrode includes theresonant circuit.

When the top electrode is grounded, the density is substantially uniformuntil about 130 mm, the density decreasing rapidly after 130 mm. Whenutilizing the resonant circuit, the density offers some variation butthere is not such a sharp decrease at the edge of the wafer as in thecase of the grounded top electrode.

FIG. 6B illustrates the variation in the etch rate across the surface ofthe substrate. When the top electrode is grounded there is a sharpdifference between etch rates at the center and the edge of the wafer.When using a resonant circuit on the top, the etch rate shows a W shape,which presents more uniformity across the wafer that in the case of thegrounded electrode. It is believed that the reason for the W shape isthat both fundamental (27 Megahertz) and its harmonics have an effect onthe etch uniformity.

By comparing the different effects of the resonant circuits, asdescribed above with reference to FIGS. 4A-6B, it appears that the 60Megahertz resonance circuit may be utilized to increase the etchuniformity across the wafer. The 27 Megahertz and 60 Megahertz do notpresent such a strong effect on the etch rate, because there is not suchan impact on the trapping of the electrodes in the sheath, as the sheathvoltage is smaller.

FIG. 7 shows a semiconductor wafer processing apparatus, in accordancewith one embodiment. The chamber of FIG. 7 includes RF power sources720, 722, and 724 with RF frequencies f₁, f₂, f₃, respectively, whichare connected to the bottom electrode 108 via the corresponding matchingnetworks M1, M2, and M3, respectively. The top electrode 104 isconnected to a fourth RF power source 120, having an RF frequency f₄,via switch 122 and matching network 116. Switch 122 couples or decouplesthe fourth RF power source to the top electrode 104. In one embodiment,filter 208 is utilized to filter out other RF frequencies from reachingthe fourth RF power source 120.

Further, the chamber includes several switches to configure theconnections to the top electrode 104. Switch 726 is operable to connector disconnect the 2 Megahertz resonant circuit 202 to the top electrode.Switch 728 is operable to connect or disconnect the 27 Megahertzresonant circuit 204 to the top electrode. Further, switch 730 isoperable to connect or disconnect the 60 Megahertz resonant circuit 206to the top electrode. In addition, the top electrode may the groundedvia switch 732, which connects or disconnects the top electrode toelectrical ground.

A first heater 718 is situated above the top electrode 104, and a secondheater 716 is situated above ground electrode 124. The heaters areisolated from the top electrode and the ground electrode by a layer ofaluminum nitride material, although other insulators may also beutilized. Heater 716 controls the temperature in the outer area of theground electrode, and heater 718 controls the temperature of the upperelectrode. Each heater is operable to be turned on or turned offindependently during a wafer processing operation.

Controlling the temperature of the upper electrode may be utilized toadjust the response of the chamber. However, controlling the temperaturehas the limitation that the temperature cannot be changed quickly.Therefore, temperature control provides a slow response to changes inthe chamber. It is difficult to control each wafer-processing operationutilizing temperature control of the top electrode. In addition, thereis an upper limit to the temperature that can be applied to the siliconsurfaces in the chamber.

The wafer processing apparatus further includes system controller 702,upper electrode power and impedance controller 302, and powercontrollers 710, 712, and 714 for f₁, f₂, and f₃, respectively. Systemcontroller 702 receives a plasma recipe 704, which includes instructionsfor the different operations performed on the chamber. Processing of thewafer may be done in multiple operations, and each operation may requiredifferent settings in the chamber. For example, in one operation allfour RF power sources are turned on, while in other operations only 3,or 2, or 1 RF power sources are turned on, etc.

Upper electrode power and impedance controller 302 is operable to setthe position of switches 122, 726, 728, 730, and 732 coupled to the topelectrode, enabling the top electrode to be configured at differentprocessing operations in the chamber. In addition, the upper electrodepower and impedance controller 302 is operable to turn off RF powersource 120 when the RF power source is not required for a givenoperation. The system controller 702 interacts with the upper electrodepower and impedance controller 302 to set the appropriate parameters inthe chamber based on the received plasma recipe 704.

Based on the plasma recipe 704, the system controller sets theoperational parameters of the chamber, including which RF power sourcesare turned on or turned off, their voltages and their power settings,the setting of switches 122, 726, 728, 730, and 732, the settings forheaters degrees 316 and 318, the gasses used in the chamber, thepressure on the chamber, the duration of the wafer-processing operation,etc. In one embodiment, the system controller 702 sends instructions toupper electrode power and impedance controller 302 for the configurationof the power on the top electrode, which includes setting the positionof the switches, and turning on or off RF power 120, and setting thepower level for RF power 120 during operation.

System controller 702 also interfaces with power controllers 710, 712,and 714, which regulate whether the corresponding RF powers 720, 722,and 724 are turned on or off, and if a power is turned on, to what powersetting. In one embodiment, the frequency of RF power source 120 is 400kHz. In another embodiment, the frequency is in the range from 400 kHzto 2 MHz, while in yet another embodiment the frequency is in the rangefrom 100 kHz to 10 MHz. In some operations, the three bottom RF powersare not turned on simultaneously, which allows having a higher frequencyat the top RF. In one embodiment, the frequency of RF power source 120is different from the frequencies at the bottom f₁-f₃ in order to avoidresonance in the chamber.

In one embodiment, the pressure in the chamber has a value between 20mTorr and 60 mTorr. In another embodiment, the voltage of the top powersource can be in the range of hundreds of volts (e.g., 100 V to 2000 Vor more), and the bottom RF power sources can have a voltage up to 6000V or more. In one embodiment, the voltage is 1000 V. In anotherembodiment, the voltage of the top RF power source has a value between100 V and 600 V, and the voltage of the bottom RF power sources has avalue between 1000 V and 6000V. The pressure in the top chamber and thebottom chamber can have a value between 10 mTorr and 500 mTorr. In oneembodiment, the chamber operates at a pressure of 15 mTorr.

It is noted that the embodiment illustrated in FIG. 7 is exemplary.Other embodiments may utilize different types of chambers, differentfrequencies, other types of adjustments for the chamber configurationbased on the recipe, different pressures in the chamber, etc. Forexample, in one embodiment, the chamber is a CCP plasma chamber.Furthermore, some of the modules described above in the semiconductorwafer processing apparatus may be combined into a single module, or thefunctionality of a single module may be performed by a plurality ofmodules. For example, in one embodiment, power controllers 710, 712, and714 are integrated within system controller 302, although otherconfigurations are also possible. The embodiment illustrated in FIG. 7should therefore not be interpreted to be exclusive or limiting, butrather exemplary or illustrative.

FIG. 8A shows the flow of an algorithm for processing a wafer in a waferprocessing apparatus including a top electrode and a bottom electrode ofa processing chamber (e.g. the chamber of FIG. 7), in accordance withone embodiment. In operation 802, a recipe for processing the wafer isreceived. From operation 802, the method flows to operation 804 where acheck is made to determine if the first RF power is to be enabled. Ifthe first RF power is to be enabled, the method flows to operation 806,where the first RF power is turned on, and if the first RF power is notto be enabled, the method flows to operation 808, where the RF power isturned off.

In operation 810 a check is made to determine if the second RF power isto be enabled. If the second RF power is to be enabled, the method flowsto operation 812, where the second RF power is turned on, and if thesecond RF power is not to be enabled, the method flows to operation 814,where the second RF power is turned off.

In operation 816 a check is made to determine if the third RF power isto be enabled. If the third RF power is to be enabled, the method flowsto operation 818, where the third RF power is turned on, and if thethird RF power is not to be enabled, the method flows to operation 820,where the third RF power is turned off.

In operation 822 a check is made to determine if the fourth RF power isto be enabled. If the fourth RF power is to be enabled, the method flowsto operation 824, where the fourth RF power is turned on, and if thefourth RF power is not to be enabled, the method flows to operation 826,where the fourth RF power is turned off.

After the four RF powers have been turned on or off, the method flows tooperation 828, where a position of the first switch is set, based on therecipe, to couple or decouple the top electrode to the fourth RF power.From operation 828, the method flows to operation 830, where theposition of the second switch is set, based on the recipe, to couple ordecouple the top electrode to the first resonant circuit.

From operation 830, the method continues to operation 832, where theposition of the first switch is set, based on the recipe, to couple ordecouple the top electrode to electrical ground. In operation 834 thewafer is processed.

FIG. 8B illustrates a method for tuning a resonant circuit, according toone embodiment (see for example resonant circuit with variable capacitorC_(x) in FIG. 3A). In operation 852, the plasma is struck in theprocessing chamber. After the plasma has been struck, in operation 854,the variable capacitor in the resonant circuit is adjusted until theminimum voltage on the upper electrode is obtained. This firstadjustment of the variable capacitor is referred to as coarse tuning.

From operation 854, the method flows to operation 856, where thevariable capacitor is readjusted to shift the voltage on the upperelectrode away from the resonance point in order to run in a stableregime. Because the resonant circuit is near the resonant point, theimpedance for the resonant RF frequency will be still very high, but thecircuit will be more stable because any small variation in the impedancewill not cause a large change in the voltage of the upper electrode. Thesecond adjustment of the variable capacitor is referred to as finetuning.

After the value for the variable capacitor is set during the operationsof coarse tuning and fine tuning, the substrate is processed in thechamber with the fine-tuned resonant circuit.

FIG. 9 is a simplified schematic diagram of a computer system forimplementing embodiments described herein. It should be appreciated thatthe methods described herein may be performed with a digital processingsystem, such as a conventional, general-purpose computer system. Specialpurpose computers, which are designed or programmed to perform only onefunction, may be used in the alternative. The computer system includes aCentral Processing Unit (CPU) 904, which is coupled through bus 910 torandom access memory (RAM) 928, read-only memory (ROM) 912, and massstorage device 914. Power and impedance control program 908 resides inrandom access memory (RAM) 928, but can also reside in mass storage 914or ROM 912.

Mass storage device 914 represents a persistent data storage device suchas a floppy disc drive or a fixed disc drive, which may be local orremote. Network interface 930 provides connections via network 932,allowing communications with other devices. It should be appreciatedthat CPU 904 may be embodied in a general-purpose processor, a specialpurpose processor, or a specially programmed logic device. Input/Output(I/O) interface provides communication with different peripherals and isconnected with CPU 904, RAM 928, ROM 912, and mass storage device 914,through bus 910. Sample peripherals include display 918, keyboard 922,cursor control 924, removable media device 934, etc.

Display 918 is configured to display the user interfaces describedherein. Keyboard 922, cursor control 924, removable media device 934,and other peripherals are coupled to I/O interface 920 in order tocommunicate information in command selections to CPU 904. It should beappreciated that data to and from external devices may be communicatedthrough I/O interface 920. The embodiments can also be practiced indistributed computing environments where tasks are performed by remoteprocessing devices that are linked through a wire-based or wirelessnetwork.

Embodiments described herein may be practiced with various computersystem configurations including hand-held devices, microprocessorsystems, microprocessor-based or programmable consumer electronics,minicomputers, mainframe computers and the like. The embodiments canalso be practiced in distributed computing environments where tasks areperformed by remote processing devices that are linked through anetwork.

With the above embodiments in mind, it should be understood that theembodiments can employ various computer-implemented operations involvingdata stored in computer systems. These operations are those requiringphysical manipulation of physical quantities. Any of the operationsdescribed herein that form part of the embodiments are useful machineoperations. The embodiments also relates to a device or an apparatus forperforming these operations. The apparatus may be specially constructedfor the required purpose, such as a special purpose computer. Whendefined as a special purpose computer, the computer can also performother processing, program execution or routines that are not part of thespecial purpose, while still being capable of operating for the specialpurpose. Alternatively, the operations may be processed by a generalpurpose computer selectively activated or configured by one or morecomputer programs stored in the computer memory, cache, or obtained overa network. When data is obtained over a network the data may beprocessed by other computers on the network, e.g., a cloud of computingresources.

One or more embodiments can also be fabricated as computer readable codeon a computer readable medium. The computer readable medium is any datastorage device that can store data, which can be thereafter be read by acomputer system. Examples of the computer readable medium include harddrives, network attached storage (NAS), read-only memory, random-accessmemory, CD-ROMs, CD-Rs, CD-RWs, magnetic tapes and other optical andnon-optical data storage devices. The computer readable medium caninclude computer readable tangible medium distributed over anetwork-coupled computer system so that the computer readable code isstored and executed in a distributed fashion.

Although the method operations were described in a specific order, itshould be understood that other housekeeping operations may be performedin between operations, or operations may be adjusted so that they occurat slightly different times, or may be distributed in a system whichallows the occurrence of the processing operations at various intervalsassociated with the processing, as long as the processing of the overlayoperations are performed in the desired way.

Although the foregoing embodiments have been described in some detailfor purposes of clarity of understanding, it will be apparent thatcertain changes and modifications can be practiced within the scope ofthe appended claims. Accordingly, the present embodiments are to beconsidered as illustrative and not restrictive, and the embodiments arenot to be limited to the details given herein, but may be modifiedwithin the scope and equivalents of the appended claims.

What is claimed is:
 1. A wafer processing apparatus including a topelectrode and a bottom electrode of a processing chamber, the waferprocessing apparatus comprising: a first radio frequency (RF) powersource, a second RF power source, and a third RF power source, thefirst, second, and third RF power sources being coupled to the bottomelectrode; a fourth RF power source coupled to the top electrode; and afirst resonant circuit coupled between the top electrode and electricalground, the first resonant circuit including a tune-in element operableto vary a frequency dependent impedance of the first resonant circuit.2. The apparatus as recited in claim 1, wherein the tune-in element isoperable to set the frequency dependent impedance of the first resonantcircuit such that a maximum value of the frequency dependent impedancecorresponds to a frequency of the first RF.
 3. The apparatus as recitedin claim 1, wherein the first resonant circuit includes: an inductor;and a variable capacitor connected serially between electrical groundand the inductor, wherein a stray capacitance in the chamber existsbetween the inductor and ground.
 4. The apparatus as recited in claim 1further including: a second resonant circuit coupled between the topelectrode and electrical ground.
 5. The apparatus as recited in claim 4further including: a third resonant circuit coupled between the topelectrode and electrical ground.
 6. The apparatus as recited in claim 1further including: a system controller, wherein the system controller isoperable to set each of the first, second, third, and fourth RF powersto be one of turned on or turned off independently during a waferprocessing operation, and wherein the system controller is operable tocouple or uncouple the first resonant circuit to the top electrode. 7.The apparatus as recited in claim 6, wherein the system controller isfurther operable to couple or uncouple the top electrode to electricalground.
 8. The apparatus as recited in claim 1, wherein the waferprocessing apparatus is configured according to a configurationincluding: the first RF power source settable to a frequency of 60 MHz;the second RF power source settable to a frequency of 27 MHz; the thirdRF power source settable to a frequency of 2 MHz; and the fourth RFpower source settable to a frequency of 400 KHz.
 9. A wafer processingapparatus including a top electrode and a bottom electrode of aprocessing chamber, the wafer processing apparatus comprising: a firstradio frequency (RF) power source, a second RF power source, a third RFpower source, and a fourth RF power source, the first, second, and thirdRF power sources being coupled to the bottom electrode; a first resonantcircuit; and a first switch, a second switch, and a third switch, thefirst switch being operable to couple the top electrode to the fourth RFpower source, the second switch being operable to couple the topelectrode to the first resonant circuit, and the third switch beingoperable to couple the top electrode to a first voltage.
 10. Theapparatus as recited in claim 9 further including: a second resonantcircuit; and a fourth switch operable to couple the top electrode to thesecond resonant circuit.
 11. The apparatus as recited in claim 10further including: a third resonant circuit; and a fifth switch operableto couple the top electrode to the third resonant circuit.
 12. Theapparatus as recited in claim 9, wherein a frequency of the first RFpower is 60 MHz, wherein a frequency of the second RF power is 27 MHz,wherein a frequency of the third RF power is 2 MHz, and wherein afrequency of the fourth RF power is 400 KHz.
 13. The apparatus asrecited in claim 9, further including: a first power controller operableto activate the first RF power source based on a recipe for processingthe wafer.
 14. The apparatus as recited in claim 9, further including: asystem controller operable to set power levels for the first, second,third, and fourth RF power sources.
 15. The apparatus as recited inclaim 9, wherein a frequency of the fourth RF power is in a range from0.1 to 10 MHz.
 16. A method for processing a wafer in a wafer processingapparatus including a top electrode and a bottom electrode of aprocessing chamber, the method comprising: receiving a recipe forprocessing the wafer; enabling or disabling each of a first radiofrequency (RF) power, a second RF power, a third RF power, and a fourthRF power based on the recipe, the first RF power, the second RF power,and the third RF power being coupled to the bottom electrode; setting aposition of a first switch based on the recipe to couple or decouple thetop electrode to the fourth RF power; setting a position of a secondswitch based on the recipe to couple or decouple the top electrode to afirst resonant circuit; setting a position of a third switch based onthe recipe to couple or decouple the top electrode to electrical ground;and processing the wafer.
 17. The method as recited in claim 16, furtherincluding: setting a frequency dependent impedance of the first resonantcircuit such that a maximum value of the frequency dependent impedancecorresponds to a frequency of the first RF power, where setting thefrequency dependent impedance includes adjusting a tune-in element inthe first resonant circuit.
 18. The method as recited in claim 16,further including: determining a next operation in the recipe forprocessing the wafer; enabling or disabling each of the first RF power,second RF power, and third RF power based on the next operation; andsetting the position of the switch based on the next operation.
 19. Themethod as recited in claim 16, further including: setting power levelsbased on the recipe for the first, second, third, and fourth RF powersbefore processing the wafer; and setting a value for the capacitance ofa variable capacitance in the first resonant circuit to achieveresonance at the frequency of the first RF power source.
 20. The methodas recited in claim 16, wherein operations of the method are performedby a computer program when executed by one or more processors, thecomputer program being embedded in a non-transitory computer-readablestorage medium.